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IPPS
1996
IEEE
13 years 11 months ago
Implementation of a SliM Array Processor
This paper presents the design and implementation of a Sliding Memory Plane (SliM) Array Processor, a mesh-connected SIMD architecture. To build the array processor, we developed ...
Hyun M. Chang, Myung Hoon Sunwoo, Tai-Hoon Cho
PPOPP
2003
ACM
14 years 24 days ago
User-controllable coherence for high performance shared memory multiprocessors
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suita...
Collin McCurdy, Charles N. Fischer
ANCS
2007
ACM
13 years 11 months ago
Congestion management for non-blocking clos networks
We propose a distributed congestion management scheme for non-blocking, 3-stage Clos networks, comprising plain buffered crossbar switches. VOQ requests are routed using multipath...
Nikolaos Chrysos
IPPS
2009
IEEE
14 years 2 months ago
Application profiling on Cell-based clusters
In this paper, we present a methodology for profiling parallel applications executing on the IBM PowerXCell 8i (commonly referred to as the “Cell” processor). Specifically, we...
Hikmet Dursun, Kevin J. Barker, Darren J. Kerbyson...
CODES
2011
IEEE
12 years 7 months ago
DistRM: distributed resource management for on-chip many-core systems
The trend towards many-core systems comes with various issues, among them their highly dynamic and non-predictable workloads. Hence, new paradigms for managing resources of many-c...
Sebastian Kobbe, Lars Bauer, Daniel Lohmann, Wolfg...