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ICCAD
2005
IEEE
131views Hardware» more  ICCAD 2005»
14 years 4 months ago
Code restructuring for improving cache performance of MPSoCs
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Guilin Chen, Mahmut T. Kandemir
WCE
2007
13 years 8 months ago
Data Communication and Parallel Computing on Twisted Hypercubes
Massively parallel distributed-memory architectures are receiving increasing attention to meet the increasing demand on processing power. Many topologies have been proposed for int...
Emad Abuelrub
HIPC
2007
Springer
14 years 1 months ago
No More Energy-Performance Trade-Off: A New Data Placement Strategy for RAID-Structured Storage Systems
Many real-world applications like Video-On-Demand (VOD) and Web servers require prompt responses to access requests. However, with an explosive increase of data volume and the emer...
Tao Xie 0004, Yao Sun
ICRA
2007
IEEE
160views Robotics» more  ICRA 2007»
14 years 1 months ago
Morphing Bus: A rapid deployment computing architecture for high performance, resource-constrained robots
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
Colin D'Souza, Byung Hwa Kim, Richard M. Voyles
IPPS
2005
IEEE
14 years 1 months ago
Scheduling Processor Voltage and Frequency in Server and Cluster Systems
Modern server farm and cluster sites consume large quantities of energy both to power and cool the machines in the site. At the same time, less power supply redundancy is offered ...
Ramakrishna Kotla, Soraya Ghiasi, Tom W. Keller, F...