552 search results - page 52 / 111 » Reducing Time Complexity in RFID Systems |
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
CGO
2004
IEEE
13 years 12 months ago
2004
IEEE
Dynamic optimization systems store optimized or translated code in a software-managed code cache in order to maximize reuse of transformed code. Code caches store superblocks that...
ICS
1993
Tsinghua U.
14 years 6 days ago
1993
Tsinghua U.
Performance monitoring of large scale parallel computers creates a dilemma: we need to collect detailed information to find performance bottlenecks, yet collecting all this data ...
WSC
2000
13 years 9 months ago
2000
MODELING FOR ENGINEERING AND ENGAGEMENT LEVEL SIMULATIONS Robert M. McGraw Richard A. MacDonald RAM Laboratories, Inc. 6540 Lusk Boulevard, Suite C200 San Diego, CA 92121, U.S.A. ...
ICASSP
2010
IEEE
13 years 8 months ago
2010
IEEE
Subspace tracking methods are widespread in signal and image processing. To reduce the influence of perturbations or outliers on the measurements, some authors have used a stocha...