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DAC
2001
ACM
14 years 8 months ago
Route Packets, Not Wires: On-Chip Interconnection Networks
Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules...
William J. Dally, Brian Towles
IPPS
1996
IEEE
13 years 11 months ago
A Class of Interconnection Networks for Multicasting
Multicast, or one-to-many, communication arises frequently in parallel computing and telecommunication applications. Multicast networks can simultaneously support multiple multicas...
Yuanyuan Yang
ICPP
1992
IEEE
13 years 11 months ago
Adaptive Binary Sorting Schemes and Associated Interconnection Networks
Many routing problems in parallel processing, such as concentration and permutation problems, can be cast as sorting problems. In this paper, we consider the problem of sorting on ...
Minze V. Chien, A. Yavuz Oruç
JSSPP
2004
Springer
14 years 25 days ago
Multi-toroidal Interconnects: Using Additional Communication Links to Improve Utilization of Parallel Computers
Three-dimensional torus is a common topology of network interconnects of multicomputers due to its simplicity and high scalability. A parallel job submitted to a three-dimensional...
Yariv Aridor, Tamar Domany, Oleg Goldshmidt, Edi S...
IPPS
1999
IEEE
13 years 11 months ago
Reducing I/O Complexity by Simulating Coarse Grained Parallel Algorithms
Block-wise access to data is a central theme in the design of efficient external memory (EM) algorithms. A second important issue, when more than one disk is present, is fully par...
Frank K. H. A. Dehne, David A. Hutchinson, Anil Ma...