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» Reducing the Costs of Bounded-Exhaustive Testing
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IOLTS
2000
IEEE
105views Hardware» more  IOLTS 2000»
14 years 20 hour ago
Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
Patrick Girard, Christian Landrault, Serge Pravoss...
IAAI
2003
13 years 9 months ago
A Probabilistic Vehicle Diagnostic System Using Multiple Models
In addition to being accurate, it is important that diagnostic systems for use in automobiles also have low development and hardware costs. Model-based methods have shown promise ...
Matthew L. Schwall, J. Christian Gerdes, Bernard B...
EURODAC
1994
IEEE
94views VHDL» more  EURODAC 1994»
13 years 11 months ago
A Study of Undetectable Non-Feedback Shorts for the Purpose of Physical-DFT
Undetectable shorts may decrease the long term reliability of a circuit, cause intermittent failures, add noise and delay, or increase test pattern generation costs. This paper de...
Richard McGowen, F. Joel Ferguson
DATE
2000
IEEE
130views Hardware» more  DATE 2000»
14 years 1 days ago
Optimal Hardware Pattern Generation for Functional BIST
∗∗ Functional BIST is a promising solution for self-testing complex digital systems at reduced costs in terms of area and performance degradation. The present paper addresses t...
Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, H...
TASE
2008
IEEE
13 years 7 months ago
Optimization of Joint Replacement Policies for Multipart Systems by a Rollout Framework
Maintaining an asset with life-limited parts, e.g., a jet engine or an electric generator, may be costly. Certain costs, e.g., setup cost, can be shared if some parts of the asset ...
Tao Sun, Qianchuan Zhao, Peter B. Luh, Robert N. T...