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HPCA
2009
IEEE
14 years 8 months ago
Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
Niti Madan, Li Zhao, Naveen Muralimanohar, Anirudd...
PAM
2010
Springer
14 years 2 months ago
The Myth of Spatial Reuse with Directional Antennas in Indoor Wireless Networks
Abstract. Interference among co-channel users is a fundamental problem in wireless networks, which prevents nearby links from operating concurrently. Directional antennas allow the...
Sriram Lakshmanan, Karthikeyan Sundaresan, Sampath...
ICIP
2009
IEEE
14 years 2 months ago
A Novel Framework for Imaging Using Compressed Sensing
Recently, there has been growing interest in using compressed sensing to perform imaging. Most of these algorithms capture the image of a scene by taking projections of the imaged ...
Pradeep Sen and Soheil Darabi
IEEEPACT
2009
IEEE
14 years 2 months ago
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
Qingda Lu, Christophe Alias, Uday Bondhugula, Thom...
IEEEPACT
2009
IEEE
14 years 2 months ago
Automatic Tuning of Discrete Fourier Transforms Driven by Analytical Modeling
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...
Basilio B. Fraguela, Yevgen Voronenko, Markus P&uu...