221 search results - page 32 / 45 » Reducing the Interconnection Network Cost of Chip Multiproce... |
FPL
2006
Springer
13 years 11 months ago
2006
Springer
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
In many Systems on Chips (SoCs), the cores are clustered in to voltage islands. When cores in an island are unused, the entire island can be shutdown to reduce the leakage power c...
GLOBECOM
2008
IEEE
14 years 1 months ago
2008
IEEE
To achieve Terabit and Petabit switching, both time (high transmission speed) and space (multi-stage interconnection network) technologies are required. We propose an Ethernet for...
ISCA
1996
IEEE
13 years 11 months ago
1996
IEEE
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
Abstract— Recent research has shown that forwarding speculative data to other processors before it is requested can improve the performance of multiprocessor systems. The most re...