221 search results - page 41 / 45 » Reducing the Interconnection Network Cost of Chip Multiproce... |
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
Design for Manufacturability (DFM) is becoming increasingly important as process geometries shrink. Conventional design rule pass/fail is not adequate to quantify DFM compliance. ...
ICDCS
2006
IEEE
14 years 1 months ago
2006
IEEE
Distributed storage systems employ replicas or erasure code to ensure high reliability and availability of data. Such replicas create great amount of network traffic that negative...
IFL
2004
Springer
2004
Springer
Exploiting Single-Assignment Properties to Optimize Message-Passing Programs by Code Transformations
14 years 25 days ago
The message-passing paradigm is now widely accepted and used mainly for inter-process communication in distributed memory parallel systems. However, one of its disadvantages is the...
NOCS
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
HIPEAC
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. Designers of large parallel computers and clusters are becoming increasingly concerned with the cost and power consumption of the interconnection network. A simple way to...