1182 search results - page 171 / 237 » Reducing the Overhead of Dynamic Analysis |
150
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MICRO
2009
IEEE
15 years 10 months ago
2009
IEEE
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
126
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ASPLOS
2008
ACM
15 years 5 months ago
2008
ACM
Future multicore processors will be more susceptible to a variety of hardware failures. In particular, intermittent faults, caused in part by manufacturing, thermal, and voltage v...
183
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TC
2011
14 years 10 months ago
2011
—Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Since a large fraction of chip area is devoted to on-...
140
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RTSS
2002
IEEE
15 years 8 months ago
2002
IEEE
Feasibility analysis of fixed priority systems has been widely studied in the real-time literature and several acceptance tests have been proposed to guarantee a set of periodic ...
134
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IPPS
1997
IEEE
15 years 7 months ago
1997
IEEE
Several optimizations to the Time Warp synchronization protocol for parallel discrete event simulation have been proposed and studied. Many of these optimizations have included so...