1182 search results - page 19 / 237 » Reducing the Overhead of Dynamic Analysis |
HIPEAC
2010
Springer
13 years 9 months ago
2010
Springer
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...
FPGA
2012
ACM
12 years 3 months ago
2012
ACM
In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
We propose two new FPGA routing switch designs that are programmable to operate in three different modes: highspeed, low-power or sleep. High-speed mode provides similar power an...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
PASTE
2010
ACM
14 years 18 days ago
2010
ACM
Multicore is now the dominant processor trend, and the number of cores is rapidly increasing. The paradigm shift to multicore forces the redesign of the software stack, which incl...