In this paper, we present a dynamic power management technique for optimizing the use of virtual channels in network on chips. The technique which is called dynamic virtual channe...
Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afz...
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
—The quality of transmission is very important in digital communication. However, in non-deterministic environment or different transmission message signal, bit error rate of PCM...
Abstract--This paper proposes an algorithm that provides both dynamic voltage scaling and power shutdown to minimize the total energy consumption of an application executed on an o...
Hyunjin Kim, Hyejeong Hong, Hong-Sik Kim, Jin-Ho A...
Abstract—We propose an Optical Line Terminal (OLT) centric Dynamic Bandwidth Allocation (DBA) scheme based on individual requests from service queues in Optical Network Units (ON...