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» Reducing the complexity of the issue logic
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ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy
SAC
2004
ACM
14 years 1 months ago
A cost-oriented approach for infrastructural design
The selection of a cost-minimizing combination of hardware and network components that satisfy organizational requirements is a complex design problem with multiple degrees of fre...
Danilo Ardagna, Chiara Francalanci, Marco Trubian
IPPS
2005
IEEE
14 years 1 months ago
A Dependency Chain Clustered Microarchitecture
In this paper we explore a new clustering approach for reducing the complexity of wide issue in-order processors based on EPIC architectures. Complexity effectiveness is achieved ...
Satish Narayanasamy, Hong Wang 0003, Perry H. Wang...
ICRA
2006
IEEE
110views Robotics» more  ICRA 2006»
14 years 1 months ago
Speeding-up Rao-blackwellized SLAM
— Recently, Rao-Blackwellized particle filters have become a popular tool to solve the simultaneous localization and mapping problem. This technique applies a particle filter i...
Giorgio Grisetti, Gian Diego Tipaldi, Cyrill Stach...
CADE
2007
Springer
14 years 8 months ago
Towards Efficient Satisfiability Checking for Boolean Algebra with Presburger Arithmetic
Boolean Algebra with Presburger Arithmetic (BAPA) is a decidable logic that combines 1) Boolean algebra of sets of uninterpreted elements (BA) and 2) Presburger arithmetic (PA). BA...
Viktor Kuncak, Martin C. Rinard