201 search results - page 12 / 41 » Reducing the number of clock variables of timed automata |
ICCD
2001
IEEE
14 years 4 months ago
2001
IEEE
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper presents a linear time algorithm to reduce a large RC interconnect network into subnetworks which are approximated with lower order equivalent RC circuits. The number o...
ASAP
2005
IEEE
14 years 1 months ago
2005
IEEE
We propose a digit-recurrence algorithm for division in real and complex number domains using a variable radix. The objective of the approach is to simplify the prescaling of the ...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...
ICS
2003
Tsinghua U.
14 years 23 days ago
2003
Tsinghua U.
In high-performance wide-issue microprocessors the access time, energy and area of the register file are often critical to overall performance. This is because these pararmeters g...