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» Reduction of Timed Hybrid Systems
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CODES
2008
IEEE
15 years 10 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
MP
2006
75views more  MP 2006»
15 years 4 months ago
A Class of stochastic programs with decision dependent uncertainty
We address a class of problems where decisions have to be optimized over a time horizon given that the future is uncertain and that the optimization decisions influence the time o...
Vikas Goel, Ignacio E. Grossmann
ICDIM
2007
IEEE
15 years 10 months ago
Estimating product lifecycle cost using a hybrid approach
It becomes clear for manufacturing companies that product lifecycle cost (LCC) is as crucial as product quality and functionality in deciding the success of a product in the marke...
Haifeng Liu, Vivekanand Gopalkrishnan, Wee Keong N...
ICCD
2007
IEEE
322views Hardware» more  ICCD 2007»
16 years 1 months ago
Voltage drop reduction for on-chip power delivery considering leakage current variations
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
Jeffrey Fan, Ning Mi, Sheldon X.-D. Tan
SIGMOD
2002
ACM
246views Database» more  SIGMOD 2002»
16 years 4 months ago
Hierarchical subspace sampling: a unified framework for high dimensional data reduction, selectivity estimation and nearest neig
With the increased abilities for automated data collection made possible by modern technology, the typical sizes of data collections have continued to grow in recent years. In suc...
Charu C. Aggarwal