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ERSA
2009
129views Hardware» more  ERSA 2009»
13 years 6 months ago
Data path Configuration Time Reduction for Run-time Reconfigurable Systems
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabe...
DMSN
2004
ACM
14 years 2 months ago
Optimization of in-network data reduction
We consider the in-network computation of approximate “big picture” summaries in bandwidth-constrained sensor networks. First we review early work on computing the Haar wavele...
Joseph M. Hellerstein, Wei Wang
FSTTCS
2000
Springer
14 years 10 days ago
Coordinatized Kernels and Catalytic Reductions: An Improved FPT Algorithm for Max Leaf Spanning Tree and Other Problems
Abstract. We describe some new, simple and apparently general methods for designing FPT algorithms, and illustrate how these can be used to obtain a signi cantly improved FPT algor...
Michael R. Fellows, Catherine McCartin, Frances A....
RTA
2009
Springer
14 years 3 months ago
An Explicit Framework for Interaction Nets
Abstract. Interaction nets are a graphical formalism inspired by Linear Logic proof-nets often used for studying higher order rewriting e.g. β-reduction. Traditional presentations...
Marc de Falco
PVLDB
2008
167views more  PVLDB 2008»
13 years 7 months ago
Keyword search on external memory data graphs
Keyword search on graph structured data has attracted a lot of attention in recent years. Graphs are a natural "lowest common denominator" representation which can combi...
Bhavana Bharat Dalvi, Meghana Kshirsagar, S. Sudar...