- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabe...
We consider the in-network computation of approximate “big picture” summaries in bandwidth-constrained sensor networks. First we review early work on computing the Haar wavele...
Abstract. We describe some new, simple and apparently general methods for designing FPT algorithms, and illustrate how these can be used to obtain a signi cantly improved FPT algor...
Michael R. Fellows, Catherine McCartin, Frances A....
Abstract. Interaction nets are a graphical formalism inspired by Linear Logic proof-nets often used for studying higher order rewriting e.g. β-reduction. Traditional presentations...
Keyword search on graph structured data has attracted a lot of attention in recent years. Graphs are a natural "lowest common denominator" representation which can combi...
Bhavana Bharat Dalvi, Meghana Kshirsagar, S. Sudar...