117 search results - page 10 / 24 » Redundancy Based Test-Suite Reduction |
ASM
2010
ASM
13 years 11 months ago
2010
ASM
Symmetry reduction is a model checking technique that can help alleviate the problem of state space explosion, by preventing redundant state space exploration. In previous work, we...
DSN
2005
IEEE
13 years 9 months ago
2005
IEEE
The increasing transient fault rate will necessitate onchip fault tolerance techniques in future processors. The speed gap between the processor and the memory is also increasing,...
ICIP
2004
IEEE
14 years 9 months ago
2004
IEEE
The recent advances in non-scalable video encoding brought by the H.264/AVC standard offered significant improvements in terms of rate-distortion performance. This paper proposes ...
ICCAD
1996
IEEE
13 years 12 months ago
1996
IEEE
In this paper we present an ecient technique to reduce the switching activity in a CMOS combinational logic network based on local logic transformations. These transformations con...
ARITH
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract— Modular reduction is a fundamental operation in cryptographic systems. Most well known modular reduction methods including Barrett’s and Montgomery’s algorithms lev...