1017 search results - page 23 / 204 » Register computations on ordinals |
DAC
1996
ACM
13 years 11 months ago
1996
ACM
In this paper, we outline general design steps of our synthesis tool to realize application specific co-processors such that for a given scientific application having intensive ite...
IEEEPACT
2000
IEEE
14 years 1 days ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
CVPR
2001
IEEE
14 years 9 months ago
2001
IEEE
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes and evaluates a new microarchitecture for out-of-order processors that supports speculative renaming. We call speculative renaming to the speculative omission ...
HPCA
1996
IEEE
13 years 11 months ago
1996
IEEE
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...