407 search results - page 1 / 82 » Register-Sensitive Software Pipelining |
CODES
2001
IEEE
14 years 2 months ago
2001
IEEE
The paper proposes a novel software-pipelining algorithm, Register Sensitive Force Directed Retiming Algorithm (RSFDRA), suitable for optimizing compilers targeting embedded VLIW ...
IPPS
1998
IEEE
14 years 3 months ago
1998
IEEE
In this paper, we propose an integrated approach for register-sensitive software pipelining. In this approach, the heuristics proposed in the stage scheduling method of Eichenberg...
IJPP
2000
13 years 10 months ago
2000
LCTRTS
2005
Springer
14 years 4 months ago
2005
Springer
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
IEEEPACT
2002
IEEE
14 years 3 months ago
2002
IEEE
This paper describes a technique for utilizing predication to support software pipelining on EPIC architectures in the presence of dynamic memory aliasing. The essential idea is t...