A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
— Due to the long simulation times of the reference input sets, microarchitects resort to alternative techniques to speed up cycle-accurate simulations. However, the reduction in...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...
Garbage collection considerably increases programmer productivity and software quality. However, it is difficult to implement garbage collection both efficiently and suitably fo...
Semantic Web Information Systems (SWIS) are Web Information Systems that use Semantic Web technologies. Hera is a modeldriven design methodology for SWIS. In Hera, models are repr...
As computing platforms become more and more complex, the task of optimizing performance critical codes becomes more challenging. Recently, more attention has been focused on automa...