407 search results - page 45 / 82 » Register-Sensitive Software Pipelining |
124
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LCTRTS
2001
Springer
15 years 7 months ago
2001
Springer
This paper presents an end-to-end synthesis technique for lowpower distributed real-time system design. This technique synthesizes supply voltages of resources to optimize system-...
109
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IPPS
2000
IEEE
15 years 7 months ago
2000
IEEE
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
111
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CHES
1999
Springer
15 years 6 months ago
1999
Springer
Cryptographic algorithms are more efficiently implemented in custom hardware than in software running on general-purpose processors. However, systems which use hardware implementat...
134
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EMSOFT
2010
Springer
15 years 16 days ago
2010
Springer
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
150
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CODES
2010
IEEE
14 years 12 months ago
2010
IEEE
In high-level synthesis, pipelined designs are often restricted by the number of memory banks available to the synthesis system. Using multiple memory banks can improve the perfor...