577 search results - page 56 / 116 » Relating Software Requirements and Architectures Using Probl... |
LCTRTS
1999
Springer
14 years 1 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
WCRE
2002
IEEE
14 years 1 months ago
2002
IEEE
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
FORTE
2001
13 years 10 months ago
2001
Use cases are useful in various stages of the software process. They are very often described using text that has to be interpreted by system designers. This could lead to implemen...
VTC
2007
IEEE
14 years 3 months ago
2007
IEEE
— Hydra is a flexible wireless network testbed being developed at UT Austin. Our focus is networks that support multiple wireless hops and where the network, especially the MAC,...
DDECS
2008
IEEE
14 years 3 months ago
2008
IEEE
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...