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» Relating timed and register automata
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CJ
2006
84views more  CJ 2006»
13 years 8 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
CORR
2007
Springer
104views Education» more  CORR 2007»
13 years 7 months ago
Observable Graphs
An edge-colored directed graph is observable if an agent that moves along its edges is able to determine his position in the graph after a sufficiently long observation of the edge...
Raphael M. Jungers, Vincent D. Blondel
ICECCS
2009
IEEE
119views Hardware» more  ICECCS 2009»
14 years 2 months ago
REMES: A Resource Model for Embedded Systems
In this paper, we introduce the model REMES for formal modeling and analysis of embedded resources such as storage, energy, communication, and computation. The model is a state-ma...
Cristina Cerschi Seceleanu, Aneta Vulgarakis, Paul...
CGO
2003
IEEE
14 years 1 months ago
Dynamic Trace Selection Using Performance Monitoring Hardware Sampling
Optimizing programs at run-time provides opportunities to apply aggressive optimizations to programs based on information that was not available at compile time. At run time, prog...
Howard Chen, Wei-Chung Hsu, Dong-yuan Chen
ALT
1998
Springer
14 years 4 days ago
Predictive Learning Models for Concept Drift
Concept drift means that the concept about which data is obtained may shift from time to time, each time after some minimum permanence. Except for this minimum permanence, the con...
John Case, Sanjay Jain, Susanne Kaufmann, Arun Sha...