1179 search results - page 38 / 236 » Relative Timing Based Verification of Timed Circuits and Sys... |
129
Voted
HIPC
2005
Springer
15 years 9 months ago
2005
Springer
Abstract. The proliferation of multiprocessor servers and multithreaded applications has increased the demand for high-performance synchronization. Traditional scheduler-based lock...
145
Voted
ICISC
2004
15 years 5 months ago
2004
An identity (ID)-based signature scheme allows any pair of users to verify each other's signatures without exchanging public key certificates. With the advent of Bilinear maps...
135
Voted
ICCAD
1996
IEEE
15 years 7 months ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
153
Voted
TIC
2000
Springer
15 years 7 months ago
2000
Springer
Abstract. A type-based certifying compiler maps source code to machine code and target-level type annotations. The target-level annotations make it possible to prove easily that th...
159
Voted
ICSE
1999
IEEE-ACM
15 years 7 months ago
1999
IEEE-ACM
Formal verification methods are used only sparingly in software development. The most successful methods to date are based on the use of model checking tools. To use such he user ...