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» Relative Timing Based Verification of Timed Circuits and Sys...
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125
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GECCO
2006
Springer
143views Optimization» more  GECCO 2006»
15 years 7 months ago
A hybridized genetic parallel programming based logic circuit synthesizer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
Wai Shing Lau, Kin-Hong Lee, Kwong-Sak Leung
CAV
2004
Springer
108views Hardware» more  CAV 2004»
15 years 7 months ago
Functional Dependency for Verification Reduction
Abstract. The existence of functional dependency among the state variables of a state transition system was identified as a common cause of inefficient BDD representation in formal...
Jie-Hong Roland Jiang, Robert K. Brayton
137
Voted
SEW
2006
IEEE
15 years 9 months ago
Integrating Probability with Time and Shared-Variable Concurrency
Complex software systems typically involve features like time, concurrency and probability, where probabilistic computations play an increasing role. It is challenging to formaliz...
Huibiao Zhu, Shengchao Qin, Jifeng He, Jonathan P....
PODS
1990
ACM
150views Database» more  PODS 1990»
15 years 7 months ago
On Being Optimistic about Real-Time Constraints
- Performancestudiesof concurrencycontrol algorithms for conventional database systems have shown that, under most operating circumstances, locking protocols outperform optimistic ...
Jayant R. Haritsa, Michael J. Carey, Miron Livny
ISCAS
2002
IEEE
89views Hardware» more  ISCAS 2002»
15 years 8 months ago
Mapping the wavelet transform onto silicon: the dynamic translinear approach
In this paper, an analog implementation of the Wavelet Transform (WT) is presented. The circuit is based on the Dynamic Translinear (DTL) circuit technique and implements, by mean...
Sandro A. P. Haddad, Wouter A. Serdijn