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» Reliability and Fault Tolerance in Trust
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DSN
2006
IEEE
14 years 3 months ago
Automatic Instruction-Level Software-Only Recovery
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Computer architects have typically ad...
Jonathan Chang, George A. Reis, David I. August
IJNSEC
2008
78views more  IJNSEC 2008»
13 years 9 months ago
Fault Tolerant Weighted Voting Algorithms
Agreement algorithms can be categorized in different ways. One categorization of such algorithms is based on whether the final decisions are exact or inexact. In inexact algorithm...
Azad H. Azadmanesh, Alireza Farahani, Lotfi Najjar
ICCD
2002
IEEE
122views Hardware» more  ICCD 2002»
14 years 6 months ago
Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example
Fault-tolerant distributed real-time systems are presently facing a lot of new challenges. Although many techniques provide effective masking of node failures on the architectural...
Andreas Steininger, Johann Vilanek
ET
2007
101views more  ET 2007»
13 years 9 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
SBCCI
2005
ACM
123views VLSI» more  SBCCI 2005»
14 years 3 months ago
Fault tolerance overhead in network-on-chip flow control schemes
Flow control mechanisms in Network-on-Chip (NoC) architectures are critical for fast packet propagation across the network and for low idling of network resources. Buffer manageme...
Antonio Pullini, Federico Angiolini, Davide Bertoz...