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» Reliable Systolic Computing Through Redundancy
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HPCA
2006
IEEE
14 years 8 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...
DAC
2005
ACM
14 years 8 months ago
Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
Sorin Manolache, Petru Eles, Zebo Peng
ISORC
2005
IEEE
14 years 1 months ago
Building Responsive TMR-Based Servers in Presence of Timing Constraints
This paper is on the construction of a fault-tolerant and responsive server subsystem in an application context where the subsystem is accessed through an asynchronous network by ...
Paul D. Ezhilchelvan, Jean-Michel Hélary, M...
SENSYS
2010
ACM
13 years 5 months ago
Surviving wi-fi interference in low power ZigBee networks
Frequency overlap across wireless networks with different radio technologies can cause severe interference and reduce communication reliability. The circumstances are particularly...
Chieh-Jan Mike Liang, Bodhi Priyantha, Jie Liu, An...
BMCBI
2006
181views more  BMCBI 2006»
13 years 7 months ago
Automatic pathway building in biological association networks
Background: Scientific literature is a source of the most reliable and comprehensive knowledge about molecular interaction networks. Formalization of this knowledge is necessary f...
Anton Yuryev, Zufar Mulyukov, Ekaterina Kotelnikov...