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CORR
2011
Springer
159views Education» more  CORR 2011»
13 years 4 months ago
Scalable constructions of fractional repetition codes in distributed storage systems
Abstract—In distributed storage systems built using commodity hardware, it is necessary to store multiple replicas of every data chunk in order to ensure system reliability. In s...
Joseph C. Koo, John T. Gill III
ENTCS
2008
96views more  ENTCS 2008»
13 years 10 months ago
Undecidability of Model Checking in Brane Logic
The Brane Calculus is a calculus intended to model the structure and the dynamics of biological membranes. In order to express properties of systems in this calculus, in previous ...
Giorgio Bacci, Marino Miculan
IPPS
1997
IEEE
14 years 2 months ago
A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis
Algebraic factorization is an extremely important part of any logic synthesis system but is computationally expensive. Hence it is important to look at parallel processing to spee...
Sumit Roy, Prithviraj Banerjee
TCAD
2008
112views more  TCAD 2008»
13 years 9 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He
CSREAESA
2006
13 years 11 months ago
Delay-Reduced Combinational Logic Synthesis using Multiplexers
- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...
Rekha K. James, T. K. Shahana, K. Poulose Jacob, S...