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ISSTA
2000
ACM
14 years 5 days ago
Testability, fault size and the domain-to-range ratio: An eternal triangle
A number of different concepts have been proposed that, loosely speaking, revolve around the notion of software testability. Indeed, the concept of testability itself has been int...
Martin R. Woodward, Zuhoor A. Al-Khanjari
ISCA
1998
IEEE
108views Hardware» more  ISCA 1998»
14 years 2 days ago
Pipeline Gating: Speculation Control for Energy Reduction
Branch prediction has enabled microprocessors to increase instruction level parallelism (ILP) by allowing programs to speculatively execute beyond control boundaries. Although spe...
Srilatha Manne, Artur Klauser, Dirk Grunwald
POS
1998
Springer
14 years 1 days ago
Swizzle Barrier Optimizations for Orthogonal Persistence in Java
Swizzling refers to the translation of object references from an external, persistent format to an internal, transient format used during application execution. Eager swizzling sc...
Kumar Brahnmath, Nathaniel Nystrom, Antony L. Hosk...
IPPS
1997
IEEE
14 years 22 hour ago
A Tool for On-line Visualization and Interactive Steering of Parallel HPC Applications
Tools for parallel systems today range from specification over debugging to performance analysis and more. Typically, they help the programmers of parallel algorithms from the ea...
Sabine Rathmayer
EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
13 years 12 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko