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DAC
2003
ACM
14 years 11 months ago
A hybrid SAT-based decision procedure for separation logic with uninterpreted functions
SAT-based decision procedures for quantifier-free fragments of firstorder logic have proved to be useful in formal verification. These decision procedures are either based on enco...
Sanjit A. Seshia, Shuvendu K. Lahiri, Randal E. Br...
GLVLSI
2002
IEEE
95views VLSI» more  GLVLSI 2002»
14 years 3 months ago
Term ordering problem on MDG
As an efficient representation of Extended Finite State Machines, Multiway Decision Graphs (MDG) are suitable for automatic hardware verification of Register Transfer Level (RTL) ...
Yi Feng, Eduard Cerny
ECOOP
2008
Springer
13 years 12 months ago
Computing Stack Maps with Interfaces
Abstract. Lightweight bytecode verification uses stack maps to annotate Java bytecode programs with type information in order to reduce the verification to type checking. This pape...
Frédéric Besson, Thomas P. Jensen, T...
AIPS
2003
13 years 11 months ago
Symmetry Reduction for SAT Representations of Transition Systems
Symmetries are inherent in systems that consist of several interchangeable objects or components. When reasoning about such systems, big computational savings can be obtained if t...
Jussi Rintanen
UAI
2004
13 years 11 months ago
Compact Value-Function Representations for Qualitative Preferences
We consider the challenge of preference elicitation in systems that help users discover the most desirable item(s) within a given database. Past work on preference elicitation foc...
Ronen I. Brafman, Carmel Domshlak, Tanya Kogan