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» Representing Sequences in Description Logics
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ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
14 years 25 days ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
ECBS
2008
IEEE
124views Hardware» more  ECBS 2008»
13 years 10 months ago
Hierarchical Model to Develop Component-Based Systems
Large and complex software systems require expressive notations for representing their software architecture. In this context Architecture Description Languages (ADLs) can be used...
Abdelkrim Amirat, Mourad Oussalah
AAAI
1993
13 years 10 months ago
Comprehensibility Improvement of Tabular Knowledge Bases
This paper discusses the important issue of knowledge base comprehensibility and describes a technique for comprehensibility improvement. Comprehensibility is often measured by si...
Atsushi Sugiura, Maximilian Riesenhuber, Yoshiyuki...
SEMWEB
2004
Springer
14 years 2 months ago
Learning Meta-descriptions of the FOAF Network
We argue that in a distributed context, such as the Semantic Web, ontology engineers and data creators often cannot control (or even imagine) the possible uses their data or ontolo...
Gunnar Aastrand Grimnes, Peter Edwards, Alun D. Pr...
DIAGRAMS
2008
Springer
13 years 10 months ago
General Euler Diagram Generation
Euler diagrams are a natural method of representing set-theoretic data and have been employed in diverse areas such as visualizing statistical data, as a basis for diagrammatic log...
Peter Rodgers, Leishi Zhang, Andrew Fish