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» Resource Sharing in Custom Instruction Set Extensions
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CASES
2005
ACM
13 years 10 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
FPL
2010
Springer
267views Hardware» more  FPL 2010»
13 years 6 months ago
A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
Gerald Hempel, Christian Hochberger, Andreas Koch
ESWS
2005
Springer
14 years 2 months ago
RDFSculpt: Managing RDF Schemas Under Set-Like Semantics
The Semantic Web is an extension of the current Web in which information is given well-defined meaning to support effective data discovery and integration. The RDF framework is a...
Zoi Kaoudi, Theodore Dalamagas, Timos K. Sellis
IEEEPACT
2008
IEEE
14 years 3 months ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...
USENIX
2008
13 years 11 months ago
Vx32: Lightweight User-level Sandboxing on the x86
Code sandboxing is useful for many purposes, but most sandboxing techniques require kernel modifications, do not completely isolate guest code, or incur substantial performance co...
Bryan Ford, Russ Cox