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MICRO
1998
IEEE
144views Hardware» more  MICRO 1998»
13 years 11 months ago
Analyzing the Working Set Characteristics of Branch Execution
To achieve highly accurate branch prediction, it is necessary not only to allocate more resources to branch prediction hardware but also to improve the understanding of branch exe...
Sangwook P. Kim, Gary S. Tyson
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 17 days ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
IEEEPACT
2006
IEEE
14 years 1 months ago
Compiling for stream processing
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
Abhishek Das, William J. Dally, Peter R. Mattson
APIN
2006
90views more  APIN 2006»
13 years 7 months ago
AgentTeamwork: Coordinating grid-computing jobs with mobile agents
AgentTeamwork is a grid-computing middleware system that dispatches a collection of mobile agents to coordinate a user job over remote computing nodes in a decentralized manner. I...
Munehiro Fukuda, Koichi Kashiwagi, Shin-ya Kobayas...
CP
2005
Springer
14 years 1 months ago
Planning and Scheduling to Minimize Tardiness
We combine mixed integer linear programming (MILP) and constraint programming (CP) to minimize tardiness in planning and scheduling. Tasks are allocated to facilities using MILP an...
John N. Hooker