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» Response Time Properties of Some Asynchronous Circuits
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NOCS
2008
IEEE
14 years 2 months ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
APPROX
2010
Springer
148views Algorithms» more  APPROX 2010»
13 years 9 months ago
Learning and Lower Bounds for AC0 with Threshold Gates
In 2002 Jackson et al. [JKS02] asked whether AC0 circuits augmented with a threshold gate at the output can be efficiently learned from uniform random examples. We answer this ques...
Parikshit Gopalan, Rocco A. Servedio
FMSD
2010
118views more  FMSD 2010»
13 years 6 months ago
On simulation-based probabilistic model checking of mixed-analog circuits
In this paper, we consider verifying properties of mixed-signal circuits, i.e., circuits for which there is an interaction between analog (continuous) and digital (discrete) values...
Edmund M. Clarke, Alexandre Donzé, Axel Leg...
IMECS
2007
13 years 9 months ago
Analysis of a Mixed-Signal Circuit in Hybrid Process Algebra ACPsrt
— ACPsrt hs is a hybrid process algebra obtained by extending a combination of two existing extensions of Algebra of Communicating Processes (ACP), namely the process algebra wit...
Ka L. Man, Michel P. Schellekens
DFT
2004
IEEE
95views VLSI» more  DFT 2004»
13 years 11 months ago
Mixed Loopback BiST for RF Digital Transceivers
In this paper we analyze the performance of a mixed built-in-self-test (BiST) for RF IC digital transceivers, where a baseband processor can be used both as a test pattern generat...
Jerzy Dabrowski, Javier Gonzalez Bayon