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» Reuse Technique in Hardware Design
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ISCAS
2003
IEEE
128views Hardware» more  ISCAS 2003»
14 years 1 months ago
Placement with symmetry constraints for analog layout using red-black trees
– The traditional way of approaching placement problems in computer-aided design (CAD) tools for analog layout is to explore an extremely large search space of feasible or unfeas...
Sarat C. Maruvada, Karthik Krishnamoorthy, Subodh ...
ISLPED
2003
ACM
91views Hardware» more  ISLPED 2003»
14 years 1 months ago
Reducing reorder buffer complexity through selective operand caching
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
14 years 1 months ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
CHARME
2003
Springer
196views Hardware» more  CHARME 2003»
14 years 1 months ago
Analyzing the Intel Itanium Memory Ordering Rules Using Logic Programming and SAT
We present a non-operational approach to specifying and analyzing shared memory consistency models. The method uses higher order logic to capture a complete set of ordering constra...
Yue Yang, Ganesh Gopalakrishnan, Gary Lindstrom, K...
ESTIMEDIA
2003
Springer
14 years 1 months ago
Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems
Current multimedia applications are characterized by highly dynamic and non-deterministic behavior as well as high-performance requirements. In addition, portable devices demand a...
Javier Resano, Diederik Verkest, Daniel Mozos, Ser...