Sciweavers

7262 search results - page 1408 / 1453
» Reversible Computer Hardware
Sort
View
CODES
2008
IEEE
15 years 10 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
ICCCN
2008
IEEE
15 years 10 months ago
Impact of Network Sharing in Multi-Core Architectures
As commodity components continue to dominate the realm of high-end computing, two hardware trends have emerged as major contributors—high-speed networking technologies and multi...
G. Narayanaswamy, Pavan Balaji, Wu-chun Feng
IEEEPACT
2008
IEEE
15 years 10 months ago
Improving support for locality and fine-grain sharing in chip multiprocessors
Both commercial and scientific workloads benefit from concurrency and exhibit data sharing across threads/processes. The resulting sharing patterns are often fine-grain, with t...
Hemayet Hossain, Sandhya Dwarkadas, Michael C. Hua...
IEEEPACT
2008
IEEE
15 years 10 months ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang
IEEEPACT
2008
IEEE
15 years 10 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
« Prev « First page 1408 / 1453 Last » Next »