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» Reversible Fault-Tolerant Logic
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SIGOPSE
2000
ACM
13 years 11 months ago
An algorithm for stabilising multiple stores
The algorithm for stabilising multiple stores, which we present in this paper, was developed in the process of designing the global stability and resilience mechanism for Grasshopp...
Ewa Z. Bem, John Rosenberg
DFT
1999
IEEE
114views VLSI» more  DFT 1999»
13 years 11 months ago
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
Markus Rudack, Dirk Niggemeyer
DSD
2007
IEEE
132views Hardware» more  DSD 2007»
13 years 11 months ago
On-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques in Future Nanoscale Technology
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
David Roberts, Nam Sung Kim, Trevor N. Mudge
ATAL
2008
Springer
13 years 9 months ago
Robust normative systems
Although normative systems, or social laws, have proved to be a highly influential approach to coordination in multi-agent systems, the issue of compliance to such normative syste...
Thomas Ågotnes, Wiebe van der Hoek, Michael ...
DOA
2001
137views more  DOA 2001»
13 years 8 months ago
Supporting Distributed Processing of Time-Based Media Streams
There are many challenges in devising solutions for online content processing of live networked multimedia sessions. These include content analysis under uncertainty (evidence of ...
Viktor S. Wold Eide, Frank Eliassen, Olav Lysne