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» Reversible Fault-Tolerant Logic
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CDES
2008
87views Hardware» more  CDES 2008»
13 years 10 months ago
Finding Minimal ESCT Expressions for Boolean Functions with Weight of up to 7
In this paper an algorithm is proposed for the synthesis and exact minimization of ESCT (Exclusive or Sum of Complex Terms) expressions for Boolean functions of up to seven comple...
Dimitrios Voudouris, Marinos Sampson, George K. Pa...
INTEGRATION
2008
89views more  INTEGRATION 2008»
13 years 8 months ago
Exact ESCT minimization for functions of up to six input variables
In this paper an efficient algorithm for the synthesis and exact minimization of ESCT(Exclusive or Sum of Complex Terms) expressions for Boolean functions of at most six variables...
Dimitrios Voudouris, Marinos Sampson, George K. Pa...
DAC
2009
ACM
14 years 9 months ago
Online cache state dumping for processor debug
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishna...
STORAGESS
2005
ACM
14 years 2 months ago
Ensuring data integrity in storage: techniques and applications
Data integrity is a fundamental aspect of storage security and reliability. With the advent of network storage and new technology trends that result in new failure modes for stora...
Gopalan Sivathanu, Charles P. Wright, Erez Zadok
ISMVL
2009
IEEE
124views Hardware» more  ISMVL 2009»
14 years 3 months ago
Equivalence Checking of Reversible Circuits
Determining the equivalence of reversible circuits designed to meet a common specification is considered. The circuits’ primary inputs and outputs must be in pure logic states ...
Robert Wille, Daniel Große, D. Michael Mille...