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» Reversible logic for supercomputing
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TVLSI
2010
13 years 4 months ago
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization
Hardware debuggers and logic analyzers must be able to record a continuous trace of data. Since the trace data are tremendous, to save space, these traces are often compressed. The...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
MCU
1998
154views Hardware» more  MCU 1998»
13 years 11 months ago
A computation-universal two-dimensional 8-state triangular reversible cellular automaton
A reversible cellular automaton (RCA) is a cellular automaton (CA) whose global function is injective and every configuration has at most one predecessor. Margolus showed that the...
Katsunobu Imai, Kenichi Morita
COLING
1996
13 years 11 months ago
Reversible delayed lexical choice in a bidirectional framework
We describe a bidirectional framework for natural language parsing and generation, using a typedfeatureformalismand an HPSG-based grammar with a parser and generator derived from ...
Graham Wilcock, Yuji Matsumoto
IUI
2004
ACM
14 years 3 months ago
Flexible re-engineering of web sites
Re-engineering transforms a final user interface into a logical representation that is manipulable enough to allow forward engineering to port a UI from one computing platform to ...
Laurent Bouillon, Jean Vanderdonckt, Kwok Chieu Ch...
WCRE
1995
IEEE
14 years 1 months ago
Observed Idiosyncracies of Relational Database Designs
Several processes have been advanced in the literature for reverse engineering of relational databases. The inputs to these processes are relational tables and available contextua...
Michael R. Blaha, William J. Premerlani