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IPPS
2005
IEEE
14 years 2 months ago
Data Redistribution and Remote Method Invocation in Parallel Component Architectures
With the increasing availability of high-performance massively parallel computer systems, the prevalence of sophisticated scientific simulation has grown rapidly. The complexity ...
Felipe Bertrand, Randall Bramley, Alan Sussman, Da...
ASAP
2000
IEEE
90views Hardware» more  ASAP 2000»
14 years 26 days ago
Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
Ruby B. Lee
CIIA
2009
13 years 9 months ago
Physical Synthesis for CPLD Architectures
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
Sid-Ahmed Senouci
ICIP
2005
IEEE
14 years 10 months ago
High throughput 2D DCT/IDCT processor for video coding
This paper describes the architecture of an 8x8 2-D DCT/IDCT processor with high throughput, reduced hardware, and a parallel-pipeline scheme. This architecture allows the process...
Gustavo A. Ruiz, Juan A. Michell, Angel M. Buron
ICSE
2009
IEEE-ACM
14 years 1 months ago
Synthesis of timed behavior from scenarios in the Fujaba Real-Time Tool Suite
Based on a well-defined component architecture the tool supports the synthesis of so-called real-time statecharts from timed sequence diagrams. The two step synthesis process add...
Stefan Henkler, Joel Greenyer, Martin Hirsch, Wilh...