With the increasing availability of high-performance massively parallel computer systems, the prevalence of sophisticated scientific simulation has grown rapidly. The complexity ...
Felipe Bertrand, Randall Bramley, Alan Sussman, Da...
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
This paper describes the architecture of an 8x8 2-D DCT/IDCT processor with high throughput, reduced hardware, and a parallel-pipeline scheme. This architecture allows the process...
Based on a well-defined component architecture the tool supports the synthesis of so-called real-time statecharts from timed sequence diagrams. The two step synthesis process add...
Stefan Henkler, Joel Greenyer, Martin Hirsch, Wilh...