Sciweavers

2 search results - page 1 / 1
» Robust Energy-Efficient Adder Topologies
Sort
View
ARITH
2007
IEEE
14 years 3 months ago
Robust Energy-Efficient Adder Topologies
In this paper we explore the relationship between adder topology and energy efficiency. We compare the energy-delay tradeoff curves of selected 32-bit adder topologies, to determi...
Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, R...
ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy