167 search results - page 19 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
DAC
2005
ACM
13 years 9 months ago
2005
ACM
Methodology, EDA Flow, scripts, and documentation plays a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on l...
IH
2004
Springer
14 years 26 days ago
2004
Springer
In this paper, we consider how to hide information into finite state machine (FSM), one of the popular computation models. The key advantage of hiding information in FSM is that t...
JUCS
2006
13 years 7 months ago
2006
: The paper concerns the design of evolutionary algorithms and pattern search methods on two circuit design problems: the multi-objective optimization of an Operational Transconduc...
ICCD
1995
IEEE
13 years 11 months ago
1995
IEEE
STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Low-power consumption has become a highly important concern for synchronous standard-cell design, and consequently mandates the use of low-power design methodologies and techni...