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ET
2002
84views more  ET 2002»
13 years 10 months ago
Hardware Generation of Random Single Input Change Test Sequences
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
René David, Patrick Girard, Christian Landr...
IOLTS
2008
IEEE
102views Hardware» more  IOLTS 2008»
14 years 4 months ago
Integrating Scan Design and Soft Error Correction in Low-Power Applications
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
Michael E. Imhof, Hans-Joachim Wunderlich, Christi...
DAC
2008
ACM
14 years 11 months ago
A framework for block-based timing sensitivity analysis
Since process and environmental variations can no longer be ignored in high-performance microprocessor designs, it is necessary to develop techniques for computing the sensitiviti...
Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S...
ISCAS
2008
IEEE
129views Hardware» more  ISCAS 2008»
14 years 4 months ago
Physical unclonable function with tristate buffers
— The lack of robust tamper-proofing techniques in security applications has provided attackers the ability to virtually circumvent mathematically strong cryptographic primitive...
Erdinç Öztürk, Ghaith Hammouri, B...
DAC
2007
ACM
14 years 11 months ago
PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels
Abstract-- The PPV is a robust phase domain macromodel for oscillators. It has been proven to predict oscillators' responses correctly under small signal perturbations, and ca...
Zhichun Wang, Xiaolue Lai, Jaijeet S. Roychowdhury