Sciweavers

635 search results - page 38 / 127
» Robust system level design with analog platforms
Sort
View
WSC
2004
13 years 10 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
DATE
2009
IEEE
137views Hardware» more  DATE 2009»
14 years 3 months ago
Componentizing hardware/software interface design
Abstract—Building highly optimized embedded systems demands hardware/software (HW/SW) co-design. A key challenge in co-design is the design of HW/SW interfaces, which is often a ...
Kecheng Hao, Fei Xie
AAAI
2006
13 years 10 months ago
The Robot Intelligence Kernel
The Robot Intelligence Kernel (RIK) is a portable, reconfigurable suite of perceptual, behavioral, and cognitive capabilities that can be used across many different platforms, env...
David J. Bruemmer, Douglas A. Few, Miles C. Walton...
HPDC
2000
IEEE
14 years 1 months ago
Robust Resource Management for Metacomputers
In this paper we present a robust software infrastructure for metacomputing. The system is intended to be used by others as a building block for large and powerful computational g...
Jörn Gehring, Achim Streit
HIPEAC
2005
Springer
14 years 2 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli