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» Routing for Energy Minimization in the Speed Scaling Model
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GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
13 years 12 months ago
CMOS system-on-a-chip voltage scaling beyond 50nm
† The limits on CMOS energy dissipation imposed by subthreshold leakage currents and by wiring capacitance are investigated for CMOS generations beyond 50nm at NTRS projected loc...
Azeez J. Bhavnagarwala, Blanca Austin, Ashok Kapoo...
ISLPED
2010
ACM
202views Hardware» more  ISLPED 2010»
13 years 7 months ago
MODEST: a model for energy estimation under spatio-temporal variability
Estimation of static and dynamic energy of caches is critical for high-performance low-power designs. Commercial CAD tools performing energy estimation statically are not aware of...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...
CSE
2009
IEEE
14 years 2 months ago
Prospector: Multiscale Energy Measurement of Networked Embedded Systems with Wideband Power Signals
Abstract—Today’s wirelessly networked embedded systems underlie a vast array of electronic devices, performing computation, communication, and input/output. A major design goal...
Kenji R. Yamamoto, Paul G. Flikkema
DSN
2004
IEEE
13 years 11 months ago
Fault Tolerant Energy Aware Data Dissemination Protocol in Sensor Networks
In this paper we present a data dissemination protocol for efficiently distributing data through a sensor network in the face of node and link failures. Our work is motivated by t...
Gunjan Khanna, Saurabh Bagchi, Yu-Sung Wu
SENSYS
2003
ACM
14 years 24 days ago
Model-based compression in wireless ad hoc networks
We present a technique for compression of shortest paths routing tables for wireless ad hoc networks. The main characteristic of such networks is that geographic location of nodes...
Milenko Drinic, Darko Kirovski, Miodrag Potkonjak