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» Routing in Modular Fault Tolerant Multiprocessor Systems
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SAC
2005
ACM
14 years 1 months ago
Efficient placement and routing in grid-based networks
This paper presents an efficient technique for placement and routing of sensors/actuators and processing units in a grid network. Our system requires an extremely high level of ro...
Roozbeh Jafari, Foad Dabiri, Bo-Kyung Choi, Majid ...
DSN
2011
IEEE
12 years 7 months ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li
DSD
2008
IEEE
147views Hardware» more  DSD 2008»
13 years 9 months ago
A Low-Cost Cache Coherence Verification Method for Snooping Systems
Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance is becoming increasingly important in computing systems. Shared memory i...
Demid Borodin, Ben H. H. Juurlink
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
14 years 4 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
IPPS
1998
IEEE
13 years 12 months ago
An Efficient RMS Admission Control and Its Application to Multiprocessor Scheduling
A real-time system must execute functionally correct computations in a timely manner. In order to guarantee that all tasks accepted in the system will meet their timing requiremen...
Sylvain Lauzac, Rami G. Melhem, Daniel Mossé...