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TVCG
2012
182views Hardware» more  TVCG 2012»
11 years 10 months ago
ISP: An Optimal Out-of-Core Image-Set Processing Streaming Architecture for Parallel Heterogeneous Systems
—Image population analysis is the class of statistical methods that plays a central role in understanding the development, evolution and disease of a population. However, these t...
Linh K. Ha, Jens Krüger, João Luiz Dih...
ICCAD
2001
IEEE
91views Hardware» more  ICCAD 2001»
14 years 4 months ago
A System for Synthesizing Optimized FPGA Hardware from MATLAB
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
IPPS
2006
IEEE
14 years 1 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
ASPDAC
2006
ACM
178views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Hardware architecture design of an H.264/AVC video codec
Abstract—H.264/AVC is the latest video coding standard. It significantly outperforms the previous video coding standards, but the extraordinary huge computation complexity and m...
Tung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen
WSC
1998
13 years 9 months ago
A Study of Self-adjusting Quality of Service Control Schemes
This paper reports simulation methods and results for analyzing a self-adjusting Quality of Service (QoS) control scheme for multimedia/telecommunication systems based on resource...
Sheng-Tzong Cheng, Chi-Ming Chen, Ing-Ray Chen