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» Runtime Verification Using a Temporal Description Logic
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CSL
1999
Springer
14 years 3 days ago
A Road-Map on Complexity for Hybrid Logics
Hybrid languages are extended modal languages which can refer to (or even quantify over) states. Such languages are better behaved proof theoretically than ordinary modal languages...
Carlos Areces, Patrick Blackburn, Maarten Marx
LOGCOM
2002
142views more  LOGCOM 2002»
13 years 7 months ago
Two Logical Theories of Plan Recognition
We present a logical approach to plan recognition that builds on Kautz's theory of keyhole plan recognition, defined as the problem of inferring descriptions of high-level pl...
Wayne Wobcke
LREC
2010
187views Education» more  LREC 2010»
13 years 9 months ago
Analysing Temporally Annotated Corpora with CAVaT
We present CAVaT, a tool that performs Corpus Analysis and Validation for TimeML. CAVaT is an open source, modular checking utility for statistical analysis of features specific t...
Leon Derczynski, Robert J. Gaizauskas
FMCAD
1998
Springer
14 years 1 days ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
DAC
2006
ACM
14 years 8 months ago
Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
Xiushan Feng, Alan J. Hu