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» Runtime Verification Using a Temporal Description Logic
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DSD
2009
IEEE
93views Hardware» more  DSD 2009»
13 years 5 months ago
Transactions Sequence Tracking by means of Dynamic Binary Instrumentation of TLM Models
Several traditional VHDL fault injection mechanisms like mutants or saboteurs have been adapted to SystemC model descriptions. The main drawback of these approaches is the necessi...
Antonio da Silva, Sebastian Sanchez
JAPLL
2007
88views more  JAPLL 2007»
13 years 7 months ago
Some comments on history based structures
History based models, introduced by Parikh and Ramanujam, provide a natural mathematical model of social interactive situations. These models offer a ”low level” description ...
Eric Pacuit
FMICS
2010
Springer
13 years 5 months ago
A Study of Shared-Memory Mutual Exclusion Protocols Using CADP
Mutual exclusion protocols are an essential building block of concurrent systems: indeed, such a protocol is required whenever a shared resource has to be protected against concurr...
Radu Mateescu, Wendelin Serwe
DSN
2004
IEEE
13 years 11 months ago
Verifying Web Applications Using Bounded Model Checking
The authors describe the use of bounded model checking (BMC) for verifying Web application code. Vulnerable sections of code are patched automatically with runtime guards, allowin...
Yao-Wen Huang, Fang Yu, Christian Hang, Chung-Hung...
CORR
2008
Springer
141views Education» more  CORR 2008»
13 years 7 months ago
Model checking memoryful linear-time logics over one-counter automata
We study complexity of the model-checking problems for LTL with registers (also known as freeze LTL and written LTL ) and for first-order logic with data equality tests (written F...
Stéphane Demri, Ranko Lazic, Arnaud Sangnie...