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» Runtime Verification Using a Temporal Description Logic
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FROCOS
2011
Springer
12 years 7 months ago
Tailoring Temporal Description Logics for Reasoning over Temporal Conceptual Models
Temporal data models have been used to describe how data can evolve in the context of temporal databases. Both the Extended Entity-Relationship (EER) model and the Unified Modelli...
Alessandro Artale, Roman Kontchakov, Vladislav Ryz...
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
AIEDAM
1999
157views more  AIEDAM 1999»
13 years 7 months ago
Representing a robotic domain using temporal description logics
A temporal logic for representing and reasoning on a robotic domain is presented. Actions are represented by describing what is true while the action itself is occurring, and plan...
Alessandro Artale, Enrico Franconi
LOGCOM
2010
154views more  LOGCOM 2010»
13 years 2 months ago
Collaborative Runtime Verification with Tracematches
Perfect pre-deployment test coverage is notoriously difficult to achieve for large applications. Given enough end users, however, many more test cases will be encountered during a...
Eric Bodden, Laurie J. Hendren, Patrick Lam, Ondre...
FTRTFT
1992
Springer
13 years 12 months ago
Specification and Verification of Real-Time Behaviour Using Z and RTL
Real-Time Logic is a formal notation for reasoning about temporal behaviour. Z is a general purpose specification language, but lacks explicit features for expressing real-time co...
Colin J. Fidge