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» Runtime Verification Using a Temporal Description Logic
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FORMATS
2009
Springer
13 years 11 months ago
Safe Runtime Verification of Real-Time Properties
Abstract. Introducing a monitor on a system typically changes the system's behaviour by slowing the system down and increasing memory consumption. This may possibly result in ...
Christian Colombo, Gordon J. Pace, Gerardo Schneid...
SEKE
2005
Springer
14 years 1 months ago
Generating Properties for Runtime Monitoring from Software Specification Patterns
The paper presents an approach to support run-time verification of software systems that combines two existing tools, Prospec and Java-MaC, into a single framework. Prospec can be...
Oscar Mondragon, Ann Q. Gates, Humberto Mendoza, O...
KI
2004
Springer
14 years 1 months ago
Mining Hierarchical Temporal Patterns in Multivariate Time Series
Abstract. The Unification-based Temporal Grammar is a temporal extension of static unification-based grammars. It defines a hierarchical temporal rule language to express comple...
Fabian Mörchen, Alfred Ultsch
LFCS
2009
Springer
14 years 2 months ago
Fuzzy Description Logic Reasoning Using a Fixpoint Algorithm
We present FixIt(ALC), a novel procedure for deciding knowledge base (KB) satisfiability in the Fuzzy Description Logic (FDL) ALC. FixIt(ALC) does not search for tree-structured m...
Uwe Keller, Stijn Heymans
DAC
2006
ACM
14 years 1 months ago
Use of C/C++ models for architecture exploration and verification of DSPs
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
David Brier, Raj S. Mitra